Regviz

Freescale Semiconductor /MKV58F20 /SIM /SOPT7

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SOPT7

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MKV58F20/SIM/SOPT7#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0000)HSADC0ATRGSEL 0 (00)HSADC0AALTTRGEN 0HSADC0BTRGSEL 0 (00)HSADC0BALTTRGEN 0HSADC1ATRGSEL 0 (00)HSADC1AALTTRGEN 0 (0000)HSADC1BTRGSEL 0 (00)HSADC1BALTTRGEN

HSADC1AALTTRGEN=00, HSADC1BTRGSEL=0000, HSADC0AALTTRGEN=00, HSADC0ATRGSEL=0000, HSADC1BALTTRGEN=00, HSADC0BALTTRGEN=00

Description

System Options Register 7

Fields

HSADC0ATRGSEL

HSADC0A trigger select

0 (0000): PDB external trigger pin input (PDB0_EXTRG)

1 (0001): High speed comparator 0 output

2 (0010): High speed comparator 1 output

3 (0011): High speed comparator 2 output

4 (0100): PIT trigger 0

5 (0101): PIT trigger 1

6 (0110): PIT trigger 2

7 (0111): PIT trigger 3

8 (1000): FTM0 trigger

9 (1001): FTM1 trigger

10 (1010): FTM2 trigger

11 (1011): FTM3 trigger

12 (1100): XBARA output 38

14 (1110): Low-power timer trigger
HSADC0AALTTRGEN

HSADC0A alternate trigger enable

0 (00): XBARA output 12.

1 (01): PDB0 channel0 trigger selected for HSADC0A.
HSADC0BTRGSEL

HSADC0B trigger select

1 (0001): High speed comparator 0 output

2 (0010): High speed comparator 1 output

3 (0011): High speed comparator 2 output

4 (0100): PIT trigger 0

5 (0101): PIT trigger 1

6 (0110): PIT trigger 2

7 (0111): PIT trigger 3

8 (1000): FTM0 trigger

9 (1001): FTM1 trigger

10 (1010): FTM2 trigger

11 (1011): FTM3 trigger

12 (1100): XBARA output 41

14 (1110): Low-power timer trigger
HSADC0BALTTRGEN

HSADC0B alternate trigger enable

0 (00): XBARA output 13.

1 (01): PDB1 channel0 trigger selected for HSADC0B
HSADC1ATRGSEL

HSADC1A trigger select

1 (0001): High speed comparator 0 output

2 (0010): High speed comparator 1 output

3 (0011): High speed comparator 2 output

4 (0100): PIT trigger 0

5 (0101): PIT trigger 1

6 (0110): PIT trigger 2

7 (0111): PIT trigger 3

8 (1000): FTM0 trigger

9 (1001): FTM1 trigger

10 (1010): FTM2 trigger

11 (1011): FTM3 trigger

12 (1100): XBARA output 41

14 (1110): Low-power timer trigger
HSADC1AALTTRGEN

HSADC1A alternate trigger enable

0 (00): XBARA output 42.

1 (01): PDB1 channel 1 trigger selected for HSADC1A.
HSADC1BTRGSEL

HSADC1B trigger select

0 (0000): PDB external trigger pin input (PDB0_EXTRG)

1 (0001): High speed comparator 0 output

2 (0010): High speed comparator 1 output

3 (0011): High speed comparator 2 output

4 (0100): PIT trigger 0

5 (0101): PIT trigger 1

6 (0110): PIT trigger 2

7 (0111): PIT trigger 3

8 (1000): FTM0 trigger

9 (1001): FTM1 trigger

10 (1010): FTM2 trigger

11 (1011): FTM3 trigger

12 (1100): XBARA output 38

14 (1110): Low-power timer trigger
HSADC1BALTTRGEN

HSADC1B alternate trigger enable

0 (00): XBARA output 43.

1 (01): PDB0 channel 1 trigger selected for HSADC1B

Links

()

Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data